19th International Symposium on Computer Architecture
and High Performance Computing

SBAC-PAD 2007 Awards

Click here to see the awards results of the conference.

Program:

The SBAC-PAD Conference Program is available. Print version available here.

SBAC-PAD 2007 Workshops

Click here to get the workshops that will happen during the conference.

Parallel Programming:

You can check the updated rules and awards of the Marathon and the already started Open Contest. In order to submit your proposal for the Open Contest, click here.

Featured Photo:

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Previous Editions:

Click here for previous editions of SBAC-PAD and to access their conference proceedings.

Accepted Papers

Authors must write the camera-ready version and register before the deadline specified here. These are the accepted papers for SBAC-PAD 2007 in no particular order:

Multi-level Parallelism in the Computational Modeling of the Heart by Carolina Xavier, Rafael Sachetto, Vinicius Vieira, Rodrigo Weber dos Santos (Universidade Federal de Juiz de Fora, Brazil) and Wagner Meira Jr. (Universidade Fedral de Minas Gerais, Brazil)

Computational Characteristics of Production Seismic Migration and its Performance on Novel Processor Architectures by Jairo Panetta, Paulo R. P. de Souza Filho, Carlos A. da Cunha Filho, Fernando M. Roxo da Motta, Silvio S. Pinheiro, Ivan Pedrosa Junior, Andre L. R. Rosa, Luiz R. Monnerat, Leandro T. Carneiro and Carlos H. B. de Albrecht (Petróleo Brasileiro SA, Brazil)

Voice Command Recognition with Dynamic Time Warping (DTW) using Graphics Processing Units (GPU) with Compute Unified Device Architecture (CUDA) by Gustavo Poli (Universidade Federal de Sao Carlos, Brazil) and Alexandre L. M. Levada (Universidade de São Paulo, Brasil) and João F. Mari, José Hiroki Saito (Universidade Federal de Sao Carlos, Brazil)

Exploring Novel Parallelization Technologies for 3-D Imaging Applications by Diego Rivera, Dana Schaa, Micha Moffie and David Kaeli (Northeastern University, USA)

Low-cost Techniques for Reducing Branch Context Pollution in a Soft Realtime Embedded Multithreaded Processor by Emre Özer, Alastair Reid and Stuart Biles (ARM Ltd., UK)

Self-Imposed Temporal Redundancy: An Efficient Technique to Enhance the Reliability of Pipelined Functional Units by Elias Mizan, Tileli Amimeur and Margarida F. Jacome (University of Texas at Austin, USA)

Predicting Loop Termination to Boost Speculative Thread-Level Parallelism in Embedded Applications by Mafijul Md. Islam (Chalmers University of Technology, Sweden)

Multi2Sim: A Simulation Framework to Evaluate Multicore-Multithreaded Processors by Rafael Ubal, Julio Sahuquillo, Salvador Petit and Pedro López (Universidad Politécnica de Valencia, Spain)

Performance Improvement of the Parallel Lattice Boltzmann Method Through Blocked Data Distributions by Claudio Schepke and Nicolas Maillard (Universidade Federal do Rio Grande do Sul, Brazil)

A Scalable Parallel Deduplication Algorithm by Walter Santos, Thiago Teixeira, Carla Machado, Wagner Meira Jr. (Universidade Federal de Minas Gerais, Brazil) and Altigran S. Da Silva (Universidade Federal do Amazonas, Brazil) and Renato Ferreira and Dorgival Guedes (Universidade Federal de Minas Gerais, Brazil)

A Multigrid-Schwarz Method for the Solution of Hydrodynamics and Heat Transfer Problems in Unstructured Meshes by Guilherme Galante, Rogério L. Rizzi (Universidade Estadual do Oeste do Paraná, Brazil) and Tiarajú A. Diverio (Universidade Federal do Rio Grande do Sul, Brazil)

Performance Evaluation of the Dual-Core Based SGI Altix 4700 by Rod Fatoohi (San Jose State University, USA)

Impacts of Multiprocessor Configurations on Workloads in Bioinformatics by Youfeng Wu, Mauricio Breternitz Jr. and Victor Ying (Intel Corporation, USA)

Efficient Hardware for Modular Exponentiation Using the Sliding-Window Method with Variable-Length Partitioning by Nadia Nedjah and Luiza de Macedo Mourelle (State University of Rio de Janeiro, Brazil)

Optimized Math Functions for a Fixed-Point DSP Architecture by Karlo G. Lenzi (Universidade Estadual de Campinas, Brazil) and Osamu Saotome (Instituto Tecnológico de Aeronáutica, Brazil)

A Component-Oriented Support for Hierarchical MPI Programming on Multi-Cluster Grid Environments by Elton Nicoletti Mathias, Vincent Cave, Francoise Baude (Universite de Nice Sophia-Antipolis, France) and Nicolas Maillard (Universidade Federal do Rio Grande do Sul, Brazil)

A Selector of Grid Resources based on the Semantic Integration of Multiple Ontologies by Alexandre P.C Silva and Mario A.R. Dantas (Universidade Federal de Santa Catarina, Brazil)

A Novel Algorithm for Indirect Reputation-Based Grid Resource Management by Javier Echaiz, Jorge R. Ardenghi and Guillermo R. Simari (Universidad Nacional del Sur, Argentina).

Register File Energy Optimization for Snooping Based Clustered VLIW Architectures by Rahul Nagpal and Y. N. Srikant (Indian Institute of Science, India)

Queue Register File Optimization Algorithm for QueueCore Processor by Arquimedes Canedo, Ben Abderazek and Masahiro Sowa (University of Electro-Communications, Japan)

An Intelligent Mechanism to Explore a Two-Level Cache Hierarchy Considering Energy Consumption and Time Performance by Abel G. Silva-Filho, Carmelo J. A. Bastos-Filho, Ricardo M.F. Lima, Davi M.A. Falcão, Filipe R. Cordeiro and Marília P. Lima (University of Pernambuco, Brazil)

A Code Compression Method to Cope with Security Hardware Overheads by Eduardo Wanderley Netto (CEFET-RN, Brazil) and Romain Vaslin, Guy Gogniat and Jean-Philippe Diguet (UBS, France)

Architectural Breakdown of End-to-End Latency in a TCP/IP Network by Steen Larsen, Parthasarathy Sarangam and Ram Huggahalli (Intel Corporation, USA)

Performance Analysis and Linear Optimization Modeling of All-to-all Collective Communication Algorithms by Hyacinthe N. Mamadou (Kyushu University, Japan) and Guilherme de Melo B. Domingues (Institute of Systems & Information Technology/Kyushu, Japan) and Takeshi Nanri and Kazuaki Murakami (Kyushu University, Japan)

Design of a Feasible On-Chip Interconnection Network for a Chip Multiprocessor (CMP) by Seung Eun Lee, Jun Ho Bahn and Nader Bagherzadeh (University of California-Irvine, USA)

Node Level Primitives for Parallel Exact Inference by Yinglong Xia and Viktor Prasanna (University of Southern California, USA)

Fault-tolerance in filter-labeled-stream applications by Bruno Coutinho, Dorgival Guedes, Wagner Meira Jr., and Renato A. Ferreira (Universidade Federal de Minas Gerais, Brazil)

High-Level Service Connectors for Component-Based High Performance Computing by Francisco H. de Carvalho-Junior, Ricardo C. Corrêa , Gisele A. Araújo, Jefferson C. Silva (Universidade Federal do Ceará, Brazil) and Rafael D. Lins (Universidade Federal de Pernambuco, Brazil).

On-line Scheduling of MPI-2 Programs with Hierarchical Work Stealing by Guilherme P. Pezzi, Márcia C. Cera, Elton Mathias, Nicolas Maillard and Philippe O. A. Navaux (Universidade Federal do Rio Grande do Sul, Brazil)

Exigency-based real-time scheduling policy to provide absolute QoS for web services by Lucas S. Casagrande, Rodrigo F. de Mello, Ricardo Bertagna, José A. Andrade Filho and Francisco J. Monaco (Universidade de São Paulo, Brazil)

DTA-C: A Decoupled multi-Threaded Architecture for CMP Systems by Roberto Giorgi, Zdravko Popovic and Nikola Puzovic (University of Siena, Italy)

Automatic Constraint Partitioning to Speed Up CLP Execution by Marluce R. Pereira (Universidade Federal de Lavras, Brazil) and Patrícia K. Vargas (Centro Universitário La Salle - Canoas, Brazil) and Maria S. de Castro (Universidade Estadual do Rio de Janeiro, Brazil) and Felipe M. G. França and Inês de Castro Dutra (Universidade Federal do Rio de Janeiro, Brazil).

Click here for the Call for Papers.

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