19th International Symposium on Computer Architecture
and High Performance Computing

Program

The print version of SBAC-PAD 2007 program is available here to download. It compreends the program of the SBAC 2007 itself, all the workshops and marathon programming. It has a map of the conference rooms in the Serra Azul hotel and the wireless LAN and password to access the web with no charge during the event.

DAYS • Wednesday • Thursday • Friday • Saturday

FRIDAY, October 26, 2007
08:30
09:45		Session 6 - Grid Computing
A Component-Oriented Support for Hierarchical MPI Programming on Multi-Cluster Grid Environments by Elton Nicoletti Mathias, Vincent Cave, Francoise Baude (Universite de Nice Sophia-Antipolis, France) and Nicolas Maillard (Universidade Federal do Rio Grande do Sul, Brazil)

A Selector of Grid Resources based on the Semantic Integration of Multiple Ontologies by Alexandre P.C Silva and Mario A.R. Dantas (Universidade Federal de Santa Catarina, Brazil)

A Novel Algorithm for Indirect Reputation-Based Grid Resource Management by Javier Echaiz, Jorge R. Ardenghi and Guillermo R. Simari (Universidad Nacional del Sur, Argentina).

09:45
10:00		Morning Break
10:00
10:30		Sponsored Talk 1
SUN Microsystems
HPC at Sun! Design and Implementation
Carlos Thomaz
10:30
12:10		Session 7 - Cache and Memory Architectures
Register File Energy Optimization for Snooping Based Clustered VLIW Architectures by Rahul Nagpal and Y. N. Srikant (Indian Institute of Science, India)

Queue Register File Optimization Algorithm for QueueCore Processor by Arquimedes Canedo, Ben Abderazek and Masahiro Sowa (University of Electro-Communications, Japan)

An Intelligent Mechanism to Explore a Two-Level Cache Hierarchy Considering Energy Consumption and Time Performance by Abel G. Silva-Filho, Carmelo J. A. Bastos-Filho, Ricardo M.F. Lima, Davi M.A. Falcão, Filipe R. Cordeiro and Marília P. Lima (University of Pernambuco, Brazil)

A Code Compression Method to Cope with Security Hardware Overheads by Eduardo Wanderley Netto (CEFET-RN, Brazil) and Romain Vaslin, Guy Gogniat and Jean-Philippe Diguet (UBS, France)

12:10
14:00		Lunch
14:00
15:00		Keynote Speaker 3
Laxmikant (Sanjay) Kale
University of Illinois at Urbana-Champaign, USA
Petascale and Multicore Programming Models: What is needed
15:00
16:15		Session 8 - Interconnection Networks, Routing, and Communication
Architectural Breakdown of End-to-End Latency in a TCP/IP Network by Steen Larsen, Parthasarathy Sarangam and Ram Huggahalli (Intel Corporation, USA)

Performance Analysis and Linear Optimization Modeling of All-to-all Collective Communication Algorithms by Hyacinthe N. Mamadou (Kyushu University, Japan) and Guilherme de Melo B. Domingues (Institute of Systems & Information Technology/Kyushu, Japan) and Takeshi Nanri and Kazuaki Murakami (Kyushu University, Japan)

Design of a Feasible On-Chip Interconnection Network for a Chip Multiprocessor (CMP) by Seung Eun Lee, Jun Ho Bahn and Nader Bagherzadeh (University of California-Irvine, USA)

16:15
16:30		Afternoon Break
16:30
17:00		Sponsored Talk 2
NEC
Teraflop Workbench @ HLRS
Fernanda Silos Mendes
17:00
18:30		SBAC Meeting
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