Computer Architecture II
A Technology-Scalable Multithreaded Architecture
Clecio D. Lima, Kentaro Sano, Hiroaki Kobayashi, Tadao Nakamura, Michael J. Flynn
Performance Evaluation of Decoding and Dispatching Stages in Simultaneous Multithreaded Architectures
Ronaldo Gonçalves, Eduard Ayguadé, Mateo Valero, Philippe O. A. Navaux
Improving the DTSVLIW Performance via Block Compaction
Alberto F. Souza