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Documento sem título
These are the accepted papers for SBAC-PAD 2008 in no particular order:
- Accurate and Low-Overhead Dynamic Detection and Preduction of Program Phases Using Branch Signatures
Balaji Vijayan (Intel Corporation),
Dmitry Ponomarev (SUNY Binghamton)
- Hiding Communication Delays in Clustered Microarchitecture
Robert LaDuca (BAE Systems),
Joseph Sharkey (Assured Information Security),
Dmitry Ponomarev (SUNY Binghamton)
- Aggressive Scheduling and Speculation in Multithreaded Architectures: Is it Worth its Salt
Jason Loew (Binghamton University),
Dmitry Ponomarev (SUNY Binghamton)
- On Simulated Annealing Applied on the Scheduling of Parallel Applications
Rodrigo Mello (University of São Paulo),
Luciano José Senger (State University of Ponta Grossa)
- Controlling Processes Reassignment in BSP Applications
Rodrigo Righi (Universidade Federal do Rio Grande do Sul),
Laércio Pilla (Universidade Federal do Rio Grande do Sul),
Alexandre Carissimi (UFRGS),
Philippe Navaux (UFRGS)
- Software Synthesis for Hard Real-Time Embedded Systems with Energy Constraints
Eduardo Antonio Guimaraes Tavares (Federal University of Pernambuco),
Bruno Silva (Centro de Informática - Universidade Federal de Pernambuco),
Paulo Maciel (UFPE),
Pedro Dallegrave (Universidade Federal de Pernambuco)
- An Optimization Mechanism Intended for Two-Level Cache Hierarchy to Improve Energy and Performance using the NSGAII Algorithm
Abel Silva-Filho (Federal University of Pernambuco),
Carmelo Bastos Filho (Universidade de Pernambuco),
Davi Marinho (Pernambuco State University),
Filipe Cordeiro (Pernambuco State University),
Rodrigo Castro (Pernambuco State University)
- ORBIT: Effective Issue Queue Soft-error Vulnerability Mitigation on Simultaneous Multithreaded Architectures using Operand Readiness-based Instruction Dispatch
Xin Fu (University of Florida),
Tao Li (University of Florida),
Fortes Jose (University of Florida)
- A Methodology for Developing High Fidelity Communication Models for Large-scale Applications on Multicore Systems
Charles Lively (Oak Ridge National Laboratory),
Sadaf Alam (Oak Ridge National Laboratory),
Jeffrey Vetter (Oak Ridge National Laboratory),
Valerie Taylor (Texas A&M University)
- A High Performance Massively Parallel Approach for Real Time Deformable Body Physics Simulation
Thiago Farias (Universidade Federal de Pernambuco),
Mozart Almeida (Universidade Federal de Pernambuco),
João Marcelo Teixeira (Centro de Informática - UFPE),
Veronica Teichrieb (Universidade Federal de Pernambuco),
Judith Kelner (UFPE)
- Using Analytical Models to Efficiently Explore Hardware Transactional Memory and Multi-core Co-design
James Poe (University of Florida),
Chang-Burm Cho (University of Florida),
Tao Li (University of Florida)
- Selection of the Register File Size and the Resource Allocation Policy on SMT Processors
Jesús Alastruey (Universidad de Zaragoza),
Teresa Monreal (Universidad de Zaragoza),
Francisco Cazorla (Barcelona Supercomputing Center),
Victor Viñals (Universidad de Zaragoza),
Mateo Valero (Technical University of Catalunya)
- Performance Sensitivity of NUCA Caches to On-Chip Network Parameters
Alessandro Bardine (University of Pisa),
Manuel Comparetti (University of Pisa),
Pierfrancesco Foglia (University of Pisa),
Giacomo Gabrielli (University of Pisa),
Cosimo Prete (University of Pisa)
- Processing Neocognitron of Face Recognition on Environment High Performance Based on GPU with CUDA Architecture
Gustavo Poli (Universidade Federal de Sao Carlos),
José Saito (Universidade Federal de São Carlos),
João Mari (Federal University of São Carlos),
Marcelo Zorzan (UFSCar - Universidade Federal de São Carlos)
- Parallel Verified Linear System Solver for Uncertain Input Data
Mariana Kolberg (Pontifícia Universidade Católica do Rio Grande do Sul),
Marcio Dorn (Pontifícia Universidade Católica do Rio Grande do Sul),
Gerd Bohlender (Universität Karlsruhe),
Luiz Gustavo Leão Fernandes (PUCRS)
- Measuring Operating System Overhead on CMT Processors
Petar Radojkovic (Barcelona Supercomputing Center),
Vladimir Cakarevic (Barcelona Supercomputing Center),
Francisco Cazorla (Barcelona Supercomputing Center),
Roberto Gioiosa (BSC- Barcelona Supercomputing Center),
Alejandro Pajuelo (Universitat Politècnica de Catalunya),
Javier Verdu (Polytechnic University of Catalonia)
- Aspect-based patterns for grid programming
Luis Daniel Benavides Navarro (Ecole des Mines de Nantes),
Remi Douence (Ecole des Mines de Nantes),
Fabien Hermenier (Ecole des Mines de Nantes),
Jean-Marc Menaud (Ecole des Mines de Nantes),
Mario Sudholt (Ecole des Mines de Nantes)
- A Segmented Bloom Filter Algorithm for Efficient Predictors
Mauricio Breternitz Jr (Intel),
Gabriel Loh (Georgia Tech),
Bryan Black (AMD),
Jeffrey Rupley (AMD),
Peter G. Sassone (Intel),
Wesley Attrot (UNICAMP),
Youfeng Wu (Intel)
- Applying Virtualization and System Management in a Cluster to Implement an Automated Emulation Testbed for Grid Applications
Rodrigo Calheiros (Pontifícia Universidade Católica do Rio Grande do Sul),
Mauro Storch (PUCRS),
Everton Alexandre (PUCRS),
Cesar De Rose (PUCRS),
Marcus Breda (HP Brazil R&D)
- A Reconfigurable Run-Time System for Filter-Stream Applications
Daniel Fireman (UFMG),
George Teodoro (UFMG),
André Souza (Universidade Federal de Minas Gerais),
Renato Ferreira (UFMG)
- A Software Transactional Memory System for an Asymmetric Processor Architecture
Felipe Goldstein (Universidade Estadual de Campinas),
Alexandro Baldassin (IC-UNICAMP),
Rodolfo Azevedo (UNICAMP),
Paulo Centoducatte (UNICAMP),
Leonardo Garcia (IBM Brasil)
- Transactional WaveCache: Towards Speculative and Out-of-Order DataFlow Execution of Memory Operations
Leandro Marzulo (COPPE/UFRJ),
Felipe França (COPPE-UFRJ),
Vitor Costa (COPPE/UFRJ)
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22323 Acessos 
